1. Field of the Disclosure
The present disclosure relates in general to semiconductor devices, and more specifically to devices and methods for testing power-on reset voltage in a semiconductor device.
2. Description of the Related Art
During power-on reset of a semiconductor device, circuits remain turned off until a power on reset voltage reaches a specified level because the circuits may operate incorrectly if they are turned on before power supplied to them reaches the specified level. Similarly, circuits remain on until power-on reset voltage drops below the specified level. It is desirable to provide semiconductor devices with capability to test whether power-on reset voltage has reached the specified level before turning on and turning off the circuits.